top of page

───     2020 PAPERS     ───

1.Junctionless Poly-GeSn Ferroelectric Thin-Film Transistors with Improved Reliability by Interface Engineering for Neuromorphic Computing

Chuan-Pu Chou, Yan-Xiao Lin, Yu-Kai Huang, Chih-Yu Chan, and Yung-Hsien Wu*

ACS Appl. Mater. Interfaces, vol. 12, pp. 1014-1023, 2020.


 

2.Co Silicide With Low Contact Resistivity Formed by Atomic Layer Deposited Cobalt and Subsequent Annealing

Shih-Chieh Teng, Zheng-Yong Liang , Chuan-Pu Chou, Yu-Hsuan Tsai, Po-Wen Chiu, and Yung-Hsien Wu*

IEEE Electron Device Lett., vol. 41, no. 1, pp. 139-142, 2020.

3.Nearly Epitaxial Low-Resistive Co Germanide Formed by Atomic Layer Deposited Cobalt and Laser Thermal Annealing

Shih-Chieh Teng , Zheng-Yong Liang , Chuan-Pu Chou, Yu-Hsuan Tsai, Po-Wen Chiu , and Yung-Hsien Wu*

IEEE Electron Device Lett., vol. 41, no. 2, pp. 272-275, 2020.

4.Impact of GeSn Crystallinity on Reliability of Ferroelectric HfZrOx for Devices with Metal-Ferroelectric-Semiconductor Structure

Chuan-Pu Chou, Yan-Xiao Lin, Yu-Kai Huang, Chih-Yu Chan, and Yung-Hsien Wu*

Physica Status Solidi–Rapid Research Lett., p. 2000170, 2020.

───   2020 CONFERENCE   ───

 

1.FeFET Memory Featuring Large Memory Window and Robust Endurance of Long-Pulse Cycling by Interface Engineering Using High-k AlON

Chi-Yu Chan, Kuen-Yi Chen, Hao-Kai Peng and Yung-Hsien Wu*

In Symposium on VLSI Technology, 2020.

     由國際電機電子工程師學會(Institute of Electrical and Electronics Engineers,IEEE)電子元件學會(Electron Devices Society)與日本應用物理學會(Japan Society of Applied Physics)主辦的Symposium on VLSI Technology是半導體領域最頂尖國際會議之一,被視為積體電路技術與先進半導體元件開發的指標。被接受的論文不僅需要具備學理上的創新,更需要兼具產業價值與前瞻性,與會者包含世界知名大學/研究中心團隊與國際半導體大廠的研究人員。

      鐵電記憶體(ferroelectric FET memory)被視為高速、低耗能且可應用至神經形態運算(neuromorphic computing)的次世代半導體記憶體。僅管如此,其可靠度仍有進一步改善的空間,其原因來自於鐵電層與Si晶圓介面品質的劣化,導致反覆操作下電荷捕捉(charge trapping)效應越趨嚴重。有鑒於此,包括詹智羽同學、陳坤意同學與彭皓楷同學在內的研究團隊開發出一種嶄新的高介電常數介面層。由於此介面層為高介電材質,鐵電記憶體其記憶視窗(memory window)可以大幅提升。由於此介面層具有熱穩定性,此介面層可有效抑制HfZrOx鐵電層與Si晶圓間的介面反應,改善介面品質,反覆操作下的可靠度獲得明顯的改善。

     邁入AI與5G的世代,系統對於高效能與高可靠度的記憶體日趨殷切。本研究主要的意義在於開發新的介面技術,克服了目前鐵電記憶體技術市場化所面臨的可靠度挑戰。另一方面,較大的記憶視窗也使得鐵電記憶體應用於神經網路之突觸元件(synaptic device)更具競爭力。

2.Improved Reliability Characteristics of HfZrOx-Based Ferroelectric FETs by Inserting High-k AlON Interfacial Layer

Hao-Kai Peng, Chi-Yu Chan, Kuen-Yi Chen, and Yung-Hsien Wu*

In International Electron Devices & Materials Symposium, New Taipei City, Taiwan, 2020.

圖片11.PNG
圖片12.PNG
圖片13.PNG
錨點 1
bottom of page